www.siliconstandard.com 1 of 6 ssm 4835m p-channel enhancement mode power mosfet simple drive requirement bv dss -30v low on-resistance r ds(on) 20m fast switching i d - 8a description absolute maximum ratings symbol units v ds v v gs v i d @ t a =2 5 a i d @ t a =7 0 a i dm a p d @t a =25 w w/ t stg t j symbol value unit rthj-amb thermal resistance junction-ambient max. 50 /w thermal data parameter total power dissipation 2.5 -55 to 150 operating junction temperature range -55 to 150 linear derating factor 0.02 storage temperature range continuous drain curren t 3 - 6 pulsed drain curren t 1,2 - 50 - 8 parameter drain-source voltage gate-source voltage continuous drain current 3 rating -30 25 power mosfets from silicon standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. the so-8 package is widely p referred for commercial and industrial surface mount applications and suited for low voltage applications such as dc/dc converters. s s s g d d d d so-8 g d s re v . 2.01 6/26/2003
www.siliconstandard.com 2 of 6 SSM4835M electrical characteristics@t j =25 o c(unless otherwise specified) symbol parameter test conditions min. typ. max. units bv dss drain-source breakdown voltage v gs =0v, i d =-250ua -30 - - v $ b v dss / $ t j breakdown voltage temperature coefficient reference to 25 # , i d =-1ma - -0.037 -v/ # r ds(on) static drain-source on-resistance v gs =-10v, i d =-8a - - 20 m " v gs =-4.5v, i d =-5a - - 35 m " v gs(th) gate threshold voltage v ds =v gs , i d =-250ua -1 - -3 v g fs forward transconductance v ds =-15v, i d =-8a - 20 - s i dss drain-source leakage current (t j =25 o c) v ds =-30v, v gs =0v - - -1 ua drain-source leakage current (t j =70 o c) v ds =-24v, v gs =0v - - -25 ua i gss gate-source leakage v gs =25 - - na q g total gate charge 2 i d =-4.6a - 36 - nc q gs gate-source charge v ds =-15v - 5.5 - nc q gd gate-drain ("miller") charge v gs =-10v - 3.5 - nc t d(on) turn-on delay time 2 v ds =-15v - 12 - ns t r rise time i d =-1a - 8 - ns t d(off) turn-off delay time r g =6 " , v gs =-10v - 75 - ns t f fall time r d =15 " -40- ns c iss input capacitance v gs =0v - 1530 - pf c oss output capacitance v ds =-15v - 900 - pf c rss reverse transfer capacitance f=1.0mhz - 280 - pf source-drain diode symbol parameter test conditions min. typ. max. units i s continuous source current ( body diode ) v d =v g =0v , v s =-1.2v - - -2.1 a i sm pulsed source current ( body diode ) 1 - - -50 a v sd forward on voltage 2 t j =25 # , i s =-2.1a, v gs =0v - -0.75 -1.2 v notes: 1.pulse width limited by max. junction temperature. 2.pulse width < 300us , duty cycle < 2%. 3.surface mounted on fr4 board, t< 10 sec. 100 re v . 2.01 6/26/2003
www.siliconstandard.com 3 of 6 SSM4835M fig 1. typical output characteristics fig 2. typical output characteristics fig 3. on-resistance v.s. gate voltage fig 4. normalized on-resistance v.s. junction temperature 0 10 20 30 40 50 0246810 -v ds , drain-to-source voltage (v) -i d , drain current (a) t c =25 o c v g =-10v v g =-8.0v v g =-6.0v v g =-4.0v 0 10 20 30 40 50 0246810 -v ds , drain-to-source voltage (v) -i d , drain current (a) t c =150 o c v g =-4.0v v g =-6.0v v g =-8.0v v g =-10v 15 20 25 30 35 40 34567891011 -v gs (v) r dson (m " " " " ) i d =-8a t c =25 # # # # 0.6 0.8 1.0 1.2 1.4 1.6 -50 0 50 100 150 t j , junction temperature ( o c) normalized r ds(on) i d =-8a v g =-10v re v . 2.01 6/26/2003
www.siliconstandard.com 4 of 6 SSM4835M fig 5. maximum drain current v.s. fig 6. typical power dissipation case temperature fig 7. maximum safe operating area fig 8. effective transient thermal impedance 0 0.5 1 1.5 2 2.5 3 0 25 50 75 100 125 150 t c , case temperature ( o c) p d (w) 0 2 4 6 8 10 25 50 75 100 125 150 t c , case temperature ( o c) -i d , drain current (a) 0.10 1.00 10.00 100.00 0.1 1 10 100 -v ds (v) -i d (a) t c =25 o c single pulse 1s 100us 1ms 10ms 100ms 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t , pulse width (s) normalized thermal response (r thja ) p dm duty factor = t/t peak t j = p dm x r thja + t a t t 0.02 0.01 0.05 0.1 0.2 duty=0.5 single pulse re v . 2.01 6/26/2003
www.siliconstandard.com 5 of 6 SSM4835M fig 9. gate charge characteristics fig 10. typical capacitance characteristics fig 11. forward characteristic of fig 12. gate threshold voltage v.s. reverse diode junction temperature 0.01 0.10 1.00 10.00 100.00 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 -v sd (v) -i s (a) t j =25 o c t j =150 o c 100 1000 10000 1 5 9 13 17 21 25 29 -v ds (v) c (pf) f =1.0mhz ciss coss crss 0 2 4 6 8 10 12 14 0 5 10 15 20 25 30 35 40 45 50 q g , total gate charge (nc) -v gs , gate to source voltage (v) i d =-4.6a v ds =-15v 0 1 2 3 -50 0 50 100 150 t j , junction temperature ( o c) -v gs(th) (v) re v . 2.01 6/26/2003
www.siliconstandard.com 6 of 6 in formation furnished by silicon standard corporation is believed to be accurate and reliable. however, silicon standard corporation makes no guarantee or warranty, expre ss or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. silicon standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. no license is granted, whether expressly or by im plication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of silicon standard corporation or any third parties. SSM4835M fig 13. switching time circuit fig 14. switching time waveform fig 15. gate charge circuit fig 16. gate charge waveform t d(on) t r t d(off) t f v ds v gs 10% 90% q v g -10v q gs q gd q g charge 0.5 x rated to the oscilloscope -10 v d g s v ds v gs r g r d 0.5 x rated v ds to the oscilloscope d g s v ds v gs i d i g -1~-3ma re v . 2.01 6/26/2003
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